Vita 57 provides a mechanical standard for I/O mezzanine modules. This standard introduces a methodology that shall allow the front panel IO of IEEE 1101 form factor cards to be configured via mezzanine boards. Vita 57 modules have fixed locations for serial/parallel IOs, clocks, Jtag signals, VCC, and GND. HiTech Global's Vita 57 modules can be plugged into any Vita 57 compliant carrier boards.
This module is supported by two QSFP/QSFP+ ports with high-performance low-jitter Silicon Labs programmable clock (default = 156.25Mhz). The I2C interface between the oscillator and FPGA allows direct control of the QSFP/QSFP+ ports for wide range of different frequencies. The QSFP/QSFP+ ports are directly connected to four multi-gigabit serial transceivers of vita 57 compliant FPGA carrier boards.