Powered by Altera Stratix V 5SGXMA5K2F40C2N or 5SGXMA7K2F40C2N FPGA, the HTG-S500 half-size PCI Express platform is ideal for applications requiring high bandwidth and low latency data processing between host servers and network interfaces used in data centers (i.e financial data processing).
Supported by 40Gig Ethernet, PCI Express Gen3, DDR3, and QDR-II reference designs along with PCI Express Linux/Windows drivers, the HTG-S500 minimizes engineering efforts for complex design integration and verification.
Availability of the HTG-S500 platform with different density of Stratix V FPGAs with the same device footprint allows easy design upgrade for different end applications.
► Altera Stratix V 5SGXMA5K2F40C2N or 5SGXMA7K2F40C2N
► x8 PCI Express Gen 3 edge connector
- Supported by IDT jitter attenuator chip providing clean PCI Express clock
► x2 QSFP+ IEEE802.3ba compliant Ethernet ports (40Gbps each)- or x8 SFP+ ports using the QSFP+ to SFP+ conversion cables
► x10 (256M words x 16 bit) DDR3 components (upgradeable to 8G)
► x2 144Mb(8M x18) QDR-II SRAMs
► 1PPS GPS Synchronization
► Connectors for I/O expansion, board to board communication, or multiple boards stack up
- 16 LVDS ports (optional through two connectors installed on the front and back side of the board)
- 12 Serial Transceiver ports (optional through two connectors installed on the front and back side of the board)
► Serial EPCS Flash
► CPLD + P30 Flash configuration
► IP protection circuitry
► PCI Express or Stand-Alone mode operation
► 6.6" x 2.5"