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This Vita57.4 compliant FMC+ module is supported by six QSFP28 (100G) or six QSFP+ (40G/56G) ports and low-jitter programmable clock generator. The device registers and EEPROM settings are fully programmable in-system via I2C serial interface for easy generation of other industry standard or custom clocks. The I2C bus can be controlled either by host FPGAs or the on board PIC processor.
Each QSFP28 /QSFP+ port is directly connected to four multi-gigabit serial transceivers of Vita 57 compliant FPGA carrier boards.