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This Vita57.1 compliant FMC module is designed for looping back serial transceivers (DP0-DP10) and differential I/Os (LA, HA, and HB) of FPGAs under test. The module is powered by Silicon Labs' Si5341A programmable clock generator device for providing ultra-low-jitter clocks (90 fs rms) for FPGA's serial transceivers and fabric.
The module can also be used as clock generator supporting clock standards such a CML, HCSL, LVCMOS, LVDS and LVPECL with
maximum output frequency of 1028 MHz.